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| Semiconductor April 1999 PRO CE NS N ESIG RAW ITHD O NEW D TW PAR ETE - N L BSO SS O MCT3A65P100F2, MCT3D65P100F2 65A, 1000V, P-Type MOS-Controlled Thyristor (MCT) [ /Title (MCT3 A65P1 00F2, MCT3 D65P1 00F2) /Subject (65A, 1000V, PType MOSControlled Thyristor (MCT) ) /Autho r () /Keywords () /Creator () /DOCI NFO pdfmark [ /PageMode /UseOutlines /DOCVIEW Features * 65A, -1000V * VTM = -1.4V (Max) at I = 65A and 150oC * 2000A Surge Current Capability * 2000A/s di/dt Capability * MOS Insulated Gate Control * 100A Gate Turn-Off Capability at 150oC Description The MCT is an MOS Controlled Thyristor designed for switching currents on and off by negative and positive pulsed control of an insulated MOS gate. It is designed for use in motor controls, inverters, line switches, and other power switching applications. The MCT is especially suited for resonant (zero voltage or zero current switching) applications. The SCR like forward drop greatly reduces conduction power loss. MCTs allow the control of high power circuits with very small amounts of input energy. They feature the high peak current capability common to SCR type thyristors, and operate at junction temperatures up to 150oC with active switching. BRAND M65P100F2 M65P100F2 Part Number Information PART NUMBER MCT3A65P100F2 MCT3D65P100F2 NOTE: PACKAGE TO-247 MO-093AA Formerly developmental type TA49226. Symbols ANODE (ANODE KELVIN) GATE RETURN GATE GATE ANODE When ordering, use the entire part number. CATHODE CATHODE (TAB) CATHODE Packaging JEDEC MO-093AA ANODE ANODE CATHODE GATE RETURN GATE JEDEC STYLE TO-247 ANODE ANODE CATHODE GATE RETURN GATE CATHODE (FLANGE) CATHODE (BOTTOM SIDE METAL) CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright (c) Harris Corporation 1999 File Number 4454.2 1 MCT3A65P100F2, MCT3D65P100F2 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified MCT3A65P100F2 MCT3D65P100F2 Peak Off-State Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRM Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRRM Continuous Cathode Current At TC = 25oC (Package Limited). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK110 Non-repetitive Peak Cathode Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IKSM Peak Controllable Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IKC Gate to Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA Gate to Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA Rate of Change of Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . di/dt Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL 85 65 2000 100 15 20 Figure 11 2000 290 2.32 -55 to 150 300 A/s W W/oC oC oC UNITS V V -1000 5 A A A A V V CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Maximum Pulse Width of 200s (Half Sine). Assume TJ (Initial) = 90oC and TJ (Final) = TJ (Max) = 150oC. Electrical Specifications PARAMETER Peak Off-State Blocking Current TC = 25oC, Unless Otherwise Specified SYMBOL IDRM TEST CONDITIONS VKA = -1000V VGA = 15V VK = 5V VGA = 15V IK = IK110 VGA = -10V VGA = 20V VGA = 15V, VKA = -20V, f = 1MHz TC = 150oC L = 200H IK = IK110 = 65A VKA = -400V VGA = 15V/-10V RG = 2.2 Test Circuit (Figure 13) TC = 150oC TC = 25oC TC = 150oC TC = 25oC TC = 150oC TC = 25oC MIN TYP 1.25 1.35 12 125 70 770 1000 2.8 15 MAX 3 100 4 100 1.4 1.5 200 1400 0.43 UNITS mA A mA A V V nA nF ns ns ns ns mJ mJ oC/W Peak Reverse Blocking Current IRRM On-State Voltage VTM Gate to Anode Leakage Current Input Capacitance Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy Turn-Off Energy (Note 2) Thermal Resistance Junction To Case NOTE: IGAS CISS td(ON)I trI td(OFF)I tfI EON EOFF RJC 2. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the cathode current equals zero (IK = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include losses due to diode recovery. 2 MCT3A65P100F2, MCT3D65P100F2 Typical Performance Curves 300 PULSE TEST PULSE DURATION - 250s 100 DUTY CYCLE < 2% (Unless Otherwise Specified) 100 PACKAGE LIMIT IK , DC CATHODE CURRENT (A) 80 IK , CATHODE CURRENT (A) 60 TJ = 150oC 10 TJ = 25oC TJ = -40oC 1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VTM , CATHODE VOLTAGE (V) 1.8 2.0 40 20 0 20 40 60 80 100 120 140 160 TC , CASE TEMPERATURE (oC) FIGURE 1. CATHODE CURRENT vs SATURATION VOLTAGE FIGURE 2. DC CATHODE CURRENT vs CASE TEMPERATURE 180 td(ON)I , TURN-ON DELAY TIME (ns) TJ = 150oC, RG = 2.2, L = 200H 160 140 120 VKA = -500V 100 80 60 0 10 20 30 40 50 60 70 80 90 100 IK , CATHODE CURRENT (A) VKA = -400V td(OFF)i , TURN-OFF DELAY TIME (s) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 10 20 30 40 50 60 70 80 90 100 VKA = -400V VKA = -500V TJ = 150oC, RG = 2.2, L = 200H IK , CATHODE CURRENT (A) FIGURE 3. TURN-ON DELAY TIME vs CATHODE CURRENT FIGURE 4. TURN-OFF DELAY TIME vs CATHODE CURRENT 80 70 trI , RISE TIME (ns) 60 tfI , FALL TIME (s) 50 VKA = -500V 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 IK , CATHODE CURRENT (A) TJ = 150oC, RG = 2.2, L = 200H VKA = -400V 1.2 TJ = 150oC, RG = 2.2, L = 200H 1.0 0.8 0.6 0.4 0.2 0 VKA = -500V VKA = -400V 0 10 20 30 40 50 60 70 IK , CATHODE CURRENT (A) 80 90 100 FIGURE 5. TURN-ON RISE TIME vs CATHODE CURRENT FIGURE 6. TURN-OFF FALL TIME vs CATHODE CURRENT 3 MCT3A65P100F2, MCT3D65P100F2 Typical Performance Curves 10 EOFF , TURN-OFF ENERGY LOSS (mJ) EON , TURN-ON ENERGY LOSS (mJ) TJ = 150oC, RG = 2.2, L = 200H (Unless Otherwise Specified) (Continued) 30 TJ = 150oC, RG = 2.2, L = 200H VKA = -500V VKA = -400V VKA = -500V 10 VKA = -400V 1 0.4 0 10 20 30 40 50 60 70 80 90 100 IK , CATHODE CURRENT (A) 1 0 10 20 30 40 50 60 70 80 90 100 IK , CATHODE CURRENT (A) FIGURE 7. TURN-ON ENERGY LOSS vs CATHODE CURRENT FIGURE 8. TURN-OFF ENERGY LOSS vs CATHODE CURRENT fMAX , MAX OPERATING FREQUENCY (kHz) 100 IK , PEAK CATHODE CURRENT (A) TJ = 150oC, L = 200H RG = 2.2 fMAX1 = 0.05/(td(OFF)I + td(ON)I) fMAX2 = (PD - PC)/(EON + EOFF) PD = ALLOWABLE DISSIPATION PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RJC = 0.43oC/W TC = 75oC 120 TJ = 150oC, RG = 2.2, L = 200H 100 CS = 1.0F 80 60 40 20 0 CS = 0.7F CS = 0F 10 TC = 110oC VKA = - 400V VKA = - 500V 1 10 100 IK , CATHODE CURRENT (A) 200 0 -400 -600 -800 -200 VKA , PEAK TURN OFF VOLTAGE (V) -1000 FIGURE 9. OPERATING FREQUENCY vs CATHODE CURRENT FIGURE 10. TURN-OFF CAPABILITY vs ANODE TO CATHODE VOLTAGE 100 CS = 0.1F, TJ = 150oC CS = 0.1F, TJ = 25oC CS = 1.0F, TJ = 150oC 1100 VDRM , BREAKDOWN VOLTAGE (V) 1050 1000 950 900 850 TJ = 150oC, VGA = 15V VSPIKE , SPIKE VOLTAGE (V) 10 CS = 1.0F, TJ = 25oC CS = 2.0F, TJ = 150oC CS = 2.0F, TJ = 25oC 1 800 10-1 100 101 102 103 104 0 10 20 30 40 50 60 70 80 90 100 di/dt, RATE OF CHANGE OF CURRENT (A/s) dv/dt, RATE OF CHANGE OF VOLTAGE (V/s) FIGURE 11. BLOCKING VOLTAGE vs RATE OF CHANGE OF VOLTAGE FIGURE 12. SPIKE VOLTAGE vs RATE OF CHANGE OF CURRENT 4 MCT3A65P100F2, MCT3D65P100F2 Test Circuits and Waveforms MAXIMUM RISE AND FALL TIME OF VG IS 200ns 200H VG 90% 10% VK IK + -VKA VG DUT Ik DIODES RURG75120 10% td(off)I tfI trI td(on)I 90% EOFF EON - FIGURE 13. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 14. SWITCHING TEST WAVEFORMS VG VG + di/dt IK VSPIKE CS DUT IK VAK 4.7k VTM + 10k 500 VA 9V 20V + FIGURE 15. VSPIKE TEST CIRCUIT FIGURE 16. VSPIKE TEST WAVEFORMS 5 MCT3A65P100F2, MCT3D65P100F2 Handling Precautions for MCTs MOS Controlled Thyristors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. MCTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBDTM LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGAM. Exceeding the rated VGA can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic zener diode from gate to anode. If gate protection is required an external zener is recommended. Operating Frequency Information Operating frequency information for a typical device (Figure 9) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs cathode current (IAK) plots are possible using the information shown for a typical unit in Figures 3 to 8. The operating frequency plot (Figure 9) of a typical device shows fMAX1 or fMAX2 whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I + td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on- state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 14. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJMAX. td(OFF) is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJMAX - TC)/RJC. The sum of device switching and conduction losses must not exceed PD . A 50% duty factor was used (Figure 9) and the conduction losses (PC) are approximated by PC = (VAK x IAK)/2. EON and EOFF are defined in the switching waveforms shown in Figure 14. EON is the integral of the instantaneous power loss (IAK x VAK) during turn-on and EOFF is the integral of the instantaneous power loss (IAK x VAK) during turn-off. All tail losses are included in the calculation for EOFF; i.e. the cathode current equals zero (IK = 0). ECCOSORBDTM is a Trademark of Emerson and Cumming, Inc. 6 MCT3A65P100F2, MCT3D65P100F2 TO-247 5 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE E A OS Q OR D TERM. 6 OP INCHES SYMBOL A b b1 b2 c D E e MIN 0.180 0.046 0.060 0.095 0.020 0.800 0.605 MAX 0.190 0.051 0.070 0.105 0.026 0.820 0.625 MILLIMETERS MIN 4.58 1.17 1.53 2.42 0.51 20.32 15.37 MAX 4.82 1.29 1.77 2.66 0.66 20.82 15.87 NOTES 2, 3 1, 2 1, 2 1, 2, 3 4 4 5 1 - L1 L b1 b2 b 1 2 34 5 0.110 TYP 0.438 BSC 0.090 0.620 0.145 0.138 0.210 0.195 0.260 0.105 0.640 0.155 0.144 0.220 0.205 0.270 2.79 TYP 11.12 BSC 2.29 15.75 3.69 3.51 5.34 4.96 6.61 2.66 16.25 3.93 3.65 5.58 5.20 6.85 c e1 J1 5 432 1 e e1 LEAD 1 LEAD 2 LEAD 3 LEAD 4 LEAD 5 TERM. 6 - GATE J1 L L1 OP Q OR OS BACK VIEW - GATE RETURN - CATHODE - ANODE ANODE CATHODE NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. 7 MCT3A65P100F2, MCT3D65P100F2 MO-093AA 5 LEAD JEDEC MO-093AA PLASTIC PACKAGE E OP INCHES A A1 MILLIMETERS MIN 4.70 1.48 1.25 1.78 0.46 20.32 15.63 MAX 4.95 1.57 1.34 2.03 0.55 20.82 15.87 NOTES 3, 4, 5 3, 4 3, 4, 5 2 7 7 8 3 2 SYMBOL A MIN 0.185 0.058 0.049 0.070 0.018 0.800 0.615 MAX 0.195 0.062 0.053 0.080 0.022 0.820 0.625 Q H1 D TERM. 6 A1 b b1 c D E L1 L b1 e e1 c H1 J1 L 0.110 TYP 0.438 BSC 0.115 0.575 0.159 0.176 0.330 0.125 0.600 0.130 0.163 0.186 2.80 TYP 11.12 BSC 2.93 14.61 4.04 4.48 8.38 3.17 15.24 3.30 4.14 4.72 75o 1 2 34 5 b e e1 LEAD 1 LEAD 2 LEAD 3 LEAD 4 LEAD 5 TERM. 6 - GATE - GATE RETURN - CATHODE - ANODE ANODE CATHODE J1 L1 OP Q NOTES: 1. These dimensions are within allowable dimensions of Rev. A of JEDEC MO-093AA outline dated 2-90. 2. Tab outline optional within boundaries of dimensions E and Q. 3. Lead dimension and finish uncontrolled in L1. 4. Lead dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder coating. 6. Maximum radius of 0.050 inches (1.27mm) on all body edges and corners. 7. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 8. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 9. Controlling dimension: Inch. 10. Revision 1 dated 1-93. 8 |
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